1. Field of the Invention
This invention relates to a charge transfer device and, more particularly, to a configuration of a well where a charge transfer line is formed.
2. Description of the Related Art
A charge transfer device is operative to transfer data in the form of electric charges from stage to stage and widely used as an image sensor and a delay unit.
A typical example of the charge transfer device is illustrated in FIGS. 1 to 3 and fabricated on an n-type semiconductor substrate 1. In the semiconductor substrate 1 is formed a p-type well 2 where an n-type charge transfer region 3, a floating diffusion region 4 and a drain region 5 are surrounded by a p-type channel stopper region 6. A plurality of small p-type regions 7 and 8 are formed in the charge transfer region 3 at a predetermined spacing for providing potential barriers between adjacent n-type sub-regions forming parts of a transfer line, and the charge transfer region 3 is covered with an oxide film Ox. Although the n-type charge transfer region 3 extends in the right direction of FIGS. 1 and 2 for providing a large number of charge transfer stages, only two stages located at the terminal end of the transfer line are shown in the figures. Most of the charge transfer region 3 and, accordingly, channels of transfer stages are relatively large in width W1, but the channel width is decreased toward the floating diffusion region 4 as will be seen from FIG. 1.
Arranged on the oxide film Ox are transfer gate electrodes 9 to 12, output gate electrodes 13 and 14 which are slightly overlapped with one another, and a reset gate electrode 15 provided over the area between the floating diffusion region 4 and the drain region 5. The transfer gate electrodes 9 and 10 are coupled to a first clock source (not shown) for producing a first phase clock signal CL1, and the transfer gate electrodes 11 and 12 are coupled to a second clock source (not shown) for producing a second phase clock signal CL2. The output gate electrodes 13 and 14 are supplied with a constant voltage level Vc, and a reset pulse signal CLr is supplied to the reset gate electrode 15. Since the drain region 5 is coupled to another constant voltage level Vdd, the floating diffusion region 4 is balanced in voltage level with the drain region 5 upon application of the reset pulse signal CLr to the reset gate electrode 15. The p-type well 2 is grounded, and the semiconductor substrate 1 is positively biased.
In operation, the first and second phase clock signals CL1 and CL2 are alternatively supplied to the transfer gate electrodes 9 to 12, and data signals in the form of electric charges are transferred from the right side to the left side of FIG. 2 in synchronization with the clock signals CL1 and CL2. Each data signal finally reaches the sub-region beneath the transfer gate electrode 12, and is further relayed to the floating diffusion region 4 through that area under the output gate electrodes 13 and 14.
When the data signal reaches the floating diffusion region 4, the potential level therein is varied and, then, detected by a source follower amplifier 16 for producing an output signal. The variation of the voltage level dV.sub.SIG in the floating diffusion region 4 is given as follows: EQU dV.sub.SIG =Q.sub.SIG /C.sub.FD
where Q.sub.SIG is the amount of electric charges of the data signal and C.sub.FD is the capacitance applied to the floating diffusion region 4. The floating diffusion region 4 is smaller in width than the n-type charge transfer region 3, and, for this reason, the ratio of the amount of the electric charges Q.sub.SIG to the capacitance C.sub.FD is relatively large. This results in the output signal widely swinging its voltage level or a large charge-to-voltage converting gain.
However, a problem is encountered in the prior art charge transfer device shown in FIGS. 1 to 3 in that a narrow channel phenomenon takes place in the charge transfer line due to the decrease in channel width at the terminal end of the charge transfer line. In detail, it is well known that the potential depth becomes small by decreasing the channel width, and this phenomenon or the narrow channel phenomenon is causative of non-transferred electric charges Qn due to acclivities of the potential edge as shown in FIG. 3. The electric charges thus left in the transfer stages deteriorate the charge transferring efficiency. On the other hand, if the channel width is increased, the voltage variation is restricted within a relatively narrow range. Thus, there is a trade-off between the charge-to-voltage converting gain and the charge transferring efficiency. A large charge-to-voltage converting gain results in a wide dynamic range of the output signal level.